1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a metal thin film of a semiconductor device and method for forming the same in which excellent step coverage and surface roughness are maintained.
2. Background of the Related Art
Generally, a method for forming a metal line of a semiconductor device includes two processes such as a tungsten plug+reactive ion etching (RIE) Al process and an Al plug process. In the tungsten plug process, it is possible to even fill a relatively small sized via so as to improve reliability. However, in this case, process steps are relatively complicate and the production cost is high. On the other hand, the Al plug process has advantages that process steps are simple and the production cost is low, but there is a problem that it is difficult for the Al plug process to apply to a microdevice of high packing density.
A related art metal thin film and method for forming a metal line using the same will be described below.
First, a process for forming a metal line using tungsten plug will be described.
FIGS. 1a to 1e are sectional views of a related art process for forming a metal line using tungsten plug.
As shown in FIG. 1a, an interleaving insulating film 2 is formed on a semiconductor substrate 1 and then selectively etched to form a contact hole 3.
Subsequently, as shown in FIG. 1b, a thin barrier metal layer 4 is formed on an entire surface of the semiconductor substrate 1 including the contact hole 3.
As shown in FIG. 1c, blanket tungsten W is deposited on the contact hole 3 on which the barrier metal layer 4 is formed, by chemical vapor deposition (CVD) process to completely fill the contact hole 3. Thus, a material layer for the formation of plug, i.e., a tungsten layer 5 is formed. At this time, the tungsten layer 5 fills the contact hole 3 and is also formed on the interleaving insulating film 2.
Afterwards, as shown in FIG. 1d, the tungsten layer 5 is planarized by chemical mechanical polishing (CMP) process or etch-back process to form a plug layer 5a. 
Finally, as shown in FIG. 1e, an anti-reflective coating (ATC) layer 6 and an Al layer 7 are deposited on the entire surface on which the plug layer 5a is formed. Thus, a metal line is formed.
The aforementioned process for forming a metal line using tungsten plug has advantages that currently used equipments are used as they are and that the process technology tested and verified by actual mass production is used. However, the production cost is high ($14.36/wf) and a lot of process steps are required, thereby reducing yield. Also, since blanket deposition process is used, it is likely that void occurs if the size of the contact hole becomes smaller.
Now, a process for forming a metal line using Al reflow will be described.
FIGS. 2a to 2d are sectional views of a related art process for forming a metal line using Al reflow.
As shown in FIG. 2a, an interleaving insulating film 22 is formed on a semiconductor substrate 21 and then selectively etched to form a contact hole 23. The contact hole 23 has a wine glass type of which corner portions are rounded, so as to improve filling efficiency of a material for the formation of plug.
Subsequently, as shown in FIG. 2b, a barrier layer and a wetting layer 24 are formed on a surface of the interleaving insulating film 22 including bottom and wall of the contact hole 23. As shown in FIG. 2c, an Al layer 25 is formed by physical vapor deposition (PVD) process. At this time, the Al layer 25 does not completely fill the contact hole 23 but partially fills the contact hole 23 due to characteristic of the PVD process.
Afterwards, as shown in FIG. 2d, the Al layer 25 is reflowed by annealing process at a temperature of 550xc2x0 C. or greater, and then is planarized to completely fill the contact hole 23. Thus, a metal line layer 25a of plug+main line structure is formed.
The aforementioned process for forming a metal line using Al reflow has an advantage that the production cost is low. However, there are problems that additional process for forming a contact hole having a shape capable of being filled is required, and aspect ratio of the contact hole is limited. Also, there are still problems that high temperature and low vacuum equipment is required, and line resistance may increase due to high temperature process.
Another related art method for forming a metal line using Al cold-hot deposition will be described with reference to FIGS. 3a to 3d. 
FIGS. 3a to 3d are sectional views of a related art process for forming a metal line using Al cold-hot deposition.
As shown in FIG. 3a, an interleaving insulating film 32 is formed on a semiconductor substrate 31 and then selectively etched to form a contact hole 33. The contact hole 33 has a greater top width than a bottom width, so as to improve filling efficiency of a material for the formation of plug.
Subsequently, as shown in FIG. 3b, a barrier layer and a wetting layer 34 are formed on a surface of the interleaving insulating film 32 including bottom and wall of the contact hole 33. As shown in FIG. 3c, a cold Al layer 35 is formed on the barrier layer and the wetting layer 34.
Afterwards, as shown in FIG. 3d, a hot Al layer 35a is formed at a temperature of 400xcx9c550xc2x0 C. to form a metal line layer of plug+main line structure.
The aforementioned process for forming a metal line using Al cold-hot deposition has advantages that no additional equipment is required because the number of process steps is small and thus the production cost is low. However, there is a problem that aspect ratio of the contact hole is limited. Also, there is a problem that line resistance may increase because relatively high temperature process is required.
Another related art method for forming a metal line using CVD/PVD Al will be described with reference to FIGS. 4a to 4d. 
FIGS. 4a to 4d are sectional views of a related art process for forming a metal line using CVD/PVD Al.
As shown in FIG. 4a, an interleaving insulating film 42 is formed on a semiconductor substrate 41 and then selectively etched by Ar sputtering process to form a contact hole 43.
Subsequently, as shown in FIG. 4b, a barrier layer and a nucleation layer 44 are formed on an upper surface of the interleaving insulating film 42 including bottom and wall of the contact hole 43. The barrier layer is formed by depositing Ti TiN or Ti/TiN by ionized PVD or CVD process.
As shown in FIG. 4c, a CVD Al layer 45 is formed on an entire surface on which the barrier layer and the wetting layer 44 are formed, at a thickness of 1000 xc3x85 or less by CVD process.
Afterwards, as shown in FIG. 4d, a PVD Al layer 46 is formed on the CVD Al layer 45 by performing PVD process at a temperature of 350xcx9c400xc2x0 C. to form a plug layer and a main line layer. The CVD Al layer 45 is used as the wetting layer required for reflow of the PVD Al layer 46. Al is deposited on the CVD Al layer 45 at a relatively high temperature and low power of 5 kW or less by PVD process, so that reflow occurs.
To improve accuracy of a subsequent patterning process, an ARC layer may be formed on the PVD Al layer 46. Ti/TiN may be used as the ARC layer.
IMP Ti/MOCVD TiN is mainly used as a metal for forming the barrier layer during the PVD/CVD Al line process, due to its excellent via filling characteristic.
The metal deposition by CVD process used in the process for forming a metal line has more excellent via filling characteristic than the PVD reflow and thus many researches using CVD have progressed in Al plug process of a next generation device. Particularly, deposition speed of the aforementioned process using PVD/CVD Al is higher than deposition speed by CVD process only, and an alloying element can be added so that a metal line having high productivity and high reliability can be fabricated. However, there is a problem that IMP Ti/MOCVD TiN mainly used as the barrier metal due to excellent via filling characteristic has a poor surface texture of a metal thin film closely related to electromigration resistance, and for this reason, reliability of the metal line is not better than IMP Ti.
Accordingly, the present invention is directed to a metal thin film of a semiconductor device and method for forming the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a metal thin film of a semiconductor device and method for forming the same in which excellent step coverage and surface roughness are maintained.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a metal thin film of a semiconductor device according to the present invention includes: a barrier metal layer formed on a semiconductor substrate; and a PVD seed thin film, a CVD thin film, and a PTD reflow thin film sequentially formed on the barrier metal layer, wherein the PVD seed thin film, the CVD thin film and the PVD reflow thin film are of the same material.
In another aspect, a method for forming a metal thin film of a semiconductor device according to the present invention includes the steps of: forming an interleaving insulating film on a semiconductor substrate and selectively etching the interleaving insulating film to form a contact hole; forming a barrier metal layer on the interleaving insulating film including the contact hole; forming a PVD seed thin film on the barrier metal layer; forming a CVD thin film on the PVD seed thin film; and forming a PVD reflow thin film on the CVD thin film to fill the contact hole and form a flat thin film on the interleaving insulating film.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.